Silicon - ASIC / FPGA / RTL Design
Salary : Up to £65k + benefits

Up to £65k + benefits
Our Semiconductor client, a global leader in the wireless world, is looking to recruit a Principal Digital ASIC Design Engineer into it's R&D centre in Cambridge.

As a Principal member of the digital design team you will be responsible for the RTL design and verification of digital components within wireless chips. You'll use your expert knowledge to architect and define chip enhancement features, and be required to take lead responsibility for small groups of digital design engineers from time to time to ensure timely delivery.

Candidates need to have a strong track record in digital ASIC design, having previously worked in a Senior/Principal level role, with expert skills in RTL coding and verification. Ideally you'll also have a strong understanding of digital physical or 'back-end' design concepts. You will be able to effectively communicate your experience and ideas with other members of the team and provide technical leadership and assistance as and when needed.

For the right candidate, a competitive salary plus bonus package is on offer together with employee bonus scheme and flexible working.

To apply, contact caroline@ic-resources.co.uk

Contact : Caroline Pye
Email : "Caroline Pye" caroline@ic-resources.co.uk
Telephone : +44(0)208 400 2444