Silicon - Full Custom / Physical Design / IC Layout
Salary : Up to £30k starting salary + benefits

Up to £30k starting salary + benefits
My client is one of the world's top Semiconductor companies in the consumer technology space. Business is looking good, and they now seek a junior Design for Test (DFT) Engineer to join them in Hertfordshire.

The overall aim of the DFT Engineer is to specify and implement effective production and test features for SOC and IP designs. Working within the ASIC design team, you will be responsible for:

- Producing block and system-level test specifications
- RTL design
- Verifying the design to ensure it is testable at the production level
- Performing Automatic Test Pattern Generation (ATPG) and debug
- Ideally have some experience of digital ASIC/FPGA design

You will have:

- A BSc/MSc/MEng degree in Electronic Engineering / Computer Science or related field
- Know how in RTL coding (VHDL and/or Verilog)
- An understanding of ASIC production test concepts
- Prior knowledge/experience of ATPG, Logic/RAM BIST and boundary scan
- Great interpersonal skills

My client is considering applicants from fresh graduate level up to 2 years experience in a digital IC design / test role. If you're looking to become a specialist in a very niche technical area then don't miss this opportunity.

To apply, send an email with your CV to caroline@ic-resources.co.uk

Contact : Caroline Pye
Email : caroline@ic-resources.co.uk
Telephone : +44(0)208 400 2444